Analytical Modeling of Modern Microprocessor Performance



ISBN: OCLC:680293029



View: 378

As the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling performance in the early stages of processor design. Analytical modeling is an alternative to detailed simulation with the potential to shorten the development cycle and provide additional insight. This thesis proposes hybrid analytical models to predict the impact of pending cache hits, hardware prefetching, and realistic miss status holding register (MSHR) resources on superscalar performance. We propose techniques to model the non-negligible influences of pending hits and the fine-grained selection of instruction profile window blocks on the accuracy of hybrid analytical models. We also present techniques to estimate the performance impact of data prefetching by modeling the timeliness of prefetches and to account for a limited number of MSHRs by restricting the size of profile window blocks. As with earlier hybrid analytical models, our approach is roughly two orders of magnitude faster than detailed simulations. Overall, our techniques reduce the error of our baseline from 39.7% to 10.3% when the number of MSHRs is unlimited. When modeling a processor with data prefetching, a limited number of MSHRs, or both, our techniques result in an average error of 13.8%, 9.5% and 17.8%, respectively. Moreover, this thesis proposes analytical models for predicting the cache contention and throughput of heavily fine-grained multithreaded architectures such as Sun Microsystems' Niagara. We first propose a novel probabilistic model using statistics characterizing individual threads run in isolation as inputs to accurately predict the number of extra cache misses due to cache contention among a large number of threads. We then present a Markov chain model for analytically estimating the throughput of multicore, fine-grained multithreaded architectures. Combined, the two models accurately predict system throughput obtained from a detailed simulator with an average.
The Computer Engineering Handbook

Author: Vojin G. Oklobdzija

Publisher: CRC Press

ISBN: 0849308852

Category: Computers

Page: 1424

View: 948

There is arguably no field in greater need of a comprehensive handbook than computer engineering. The unparalleled rate of technological advancement, the explosion of computer applications, and the now-in-progress migration to a wireless world have made it difficult for engineers to keep up with all the developments in specialties outside their own. References published only a few years ago are now sorely out of date. The Computer Engineering Handbook changes all of that. Under the leadership of Vojin Oklobdzija and a stellar editorial board, some of the industry's foremost experts have joined forces to create what promises to be the definitive resource for computer design and engineering. Instead of focusing on basic, introductory material, it forms a comprehensive, state-of-the-art review of the field's most recent achievements, outstanding issues, and future directions. The world of computer engineering is vast and evolving so rapidly that what is cutting-edge today may be obsolete in a few months. While exploring the new developments, trends, and future directions of the field, The Computer Engineering Handbook captures what is fundamental and of lasting value.
Digital Systems and Applications

Author: Vojin G. Oklobdzija

Publisher: CRC Press

ISBN: 9781351838108

Category: Computers

Page: 992

View: 584

New design architectures in computer systems have surpassed industry expectations. Limits, which were once thought of as fundamental, have now been broken. Digital Systems and Applications details these innovations in systems design as well as cutting-edge applications that are emerging to take advantage of the fields increasingly sophisticated capabilities. This book features new chapters on parallelizing iterative heuristics, stream and wireless processors, and lightweight embedded systems. This fundamental text— Provides a clear focus on computer systems, architecture, and applications Takes a top-level view of system organization before moving on to architectural and organizational concepts such as superscalar and vector processor, VLIW architecture, as well as new trends in multithreading and multiprocessing. includes an entire section dedicated to embedded systems and their applications Discusses topics such as digital signal processing applications, circuit implementation aspects, parallel I/O algorithms, and operating systems Concludes with a look at new and future directions in computing Features articles that describe diverse aspects of computer usage and potentials for use Details implementation and performance-enhancing techniques such as branch prediction, register renaming, and virtual memory Includes a section on new directions in computing and their penetration into many new fields and aspects of our daily lives
Performance Evaluation and Benchmarking

Author: Lizy Kurian John

Publisher: CRC Press

ISBN: 9781420037425

Category: Computers

Page: 304

View: 990

Computer and microprocessor architectures are advancing at an astounding pace. However, increasing demands on performance coupled with a wide variety of specialized operating environments act to slow this pace by complicating the performance evaluation process. Carefully balancing efficiency and accuracy is key to avoid slowdowns, and such a balance can be achieved with an in-depth understanding of the available evaluation methodologies. Performance Evaluation and Benchmarking outlines a variety of evaluation methods and benchmark suites, considering their strengths, weaknesses, and when each is appropriate to use. Following a general overview of important performance analysis techniques, the book surveys contemporary benchmark suites for specific areas, such as Java, embedded systems, CPUs, and Web servers. Subsequent chapters explain how to choose appropriate averages for reporting metrics and provide a detailed treatment of statistical methods, including a summary of statistics, how to apply statistical sampling for simulation, how to apply SimPoint, and a comprehensive overview of statistical simulation. The discussion then turns to benchmark subsetting methodologies and the fundamentals of analytical modeling, including queuing models and Petri nets. Three chapters devoted to hardware performance counters conclude the book. Supplying abundant illustrations, examples, and case studies, Performance Evaluation and Benchmarking offers a firm foundation in evaluation methods along with up-to-date techniques that are necessary to develop next-generation architectures.
Modeling Microprocessor Performance

Author: Bibiche Geuskens

Publisher: Springer Science & Business Media

ISBN: 9781461555612

Category: Technology & Engineering

Page: 195

View: 187

Modeling Microprocessor Performance focuses on the development of a design and evaluation tool, named RIPE (Rensselaer Interconnect Performance Estimator). This tool analyzes the impact on wireability, clock frequency, power dissipation, and the reliability of single chip CMOS microprocessors as a function of interconnect, device, circuit, design and architectural parameters. It can accurately predict the overall performance of existing microprocessor systems. For the three major microprocessor architectures, DEC, PowerPC and Intel, the results have shown agreement within 10% on key parameters. The models cover a broad range of issues that relate to the implementation and performance of single chip CMOS microprocessors. The book contains a detailed discussion of the various models and the underlying assumptions based on actual design practices. As such, RIPE and its models provide an insightful tool into single chip microprocessor design and its performance aspects. At the same time, it provides design and process engineers with the capability to model, evaluate, compare and optimize single chip microprocessor systems using advanced technology and design techniques at an early design stage without costly and time consuming implementation. RIPE and its models demonstrate the factors which must be considered when estimating tradeoffs in device and interconnect technology and architecture design on microprocessor performance.
3-Dimensional VLSI

Author: Yangdong Deng

Publisher: Springer Science & Business Media

ISBN: 9783642041570

Category: Technology & Engineering

Page: 200

View: 722

"3-Dimensional VLSI: A 2.5-Dimensional Integration Scheme"elaborates the concept and importance of 3-Dimensional (3-D) VLSI. The authors have developed a new 3-D IC integration paradigm, so-called 2.5-D integration, to address many problems that are hard to resolve using traditional non-monolithic integration schemes. The book also introduces major 3-D VLSI design issues that need to be solved by IC designers and Electronic Design Automation (EDA) developers. By treating 3-D integration in an integrated framework, the book provides important insights for semiconductor process engineers, IC designers, and those working in EDA R&D. Dr. Yangdong Deng is an associate professor at the Institute of Microelectronics, Tsinghua University, China. Dr. Wojciech P. Maly is the U. A. and Helen Whitaker Professor at the Department of Electrical and Computer Engineering, Carnegie Mellon University, USA.
Embedded Computer Systems: Architectures, Modeling, and Simulation

Author: Timo D. H?m?l?inen

Publisher: Springer Science & Business Media

ISBN: 9783540269694

Category: Computers

Page: 476

View: 600

This book constitutes the refereed proceedings of the 5th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2005, held in Samos, Greece in July 2005. The 49 revised full papers presented were thoroughly reviewed and selected from 114 submissions. The papers are organized in topical sections on reconfigurable system design and implementations, processor architectures, design and simulation, architectures and implementations, system level design, and modeling and simulation.
Euro-Par 2019: Parallel Processing Workshops

Author: Ulrich Schwardmann

Publisher: Springer Nature

ISBN: 9783030483401

Category: Computers

Page: 763

View: 587

This book constitutes revised selected papers from the workshops held at 25th International Conference on Parallel and Distributed Computing, Euro-Par 2019, which took place in Göttingen, Germany, in August 2019. The 53 full papers and 10 poster papers presented in this volume were carefully reviewed and selected from 77 submissions. Euro-Par is an annual, international conference in Europe, covering all aspects of parallel and distributed processing. These range from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-edged applications, from architecture, compiler, language and interface design and implementation to tools, support infrastructures, and application performance aspects. Chapter "In Situ Visualization of Performance-Related Data in Parallel CFD Applications" is available open access under a Creative Commons Attribution 4.0 International License via
Euro-Par 2012 Parallel Processing

Author: Christos Kaklamanis

Publisher: Springer

ISBN: 9783642328206

Category: Computers

Page: 960

View: 342

This book constitutes the thoroughly refereed proceedings of the 18th International Conference, Euro-Par 2012, held in Rhodes Islands, Greece, in August 2012. The 75 revised full papers presented were carefully reviewed and selected from 228 submissions. The papers are organized in topical sections on support tools and environments; performance prediction and evaluation; scheduling and load balancing; high-performance architectures and compilers; parallel and distributed data management; grid, cluster and cloud computing; peer to peer computing; distributed systems and algorithms; parallel and distributed programming; parallel numerical algorithms; multicore and manycore programming; theory and algorithms for parallel computation; high performance network and communication; mobile and ubiquitous computing; high performance and scientific applications; GPU and accelerators computing.
VLSI: Systems on a Chip

Author: Luis Miguel Silveira

Publisher: Springer

ISBN: 9780387354989

Category: Technology & Engineering

Page: 678

View: 899

For over three decades now, silicon capacity has steadily been doubling every year and a half with equally staggering improvements continuously being observed in operating speeds. This increase in capacity has allowed for more complex systems to be built on a single silicon chip. Coupled with this functionality increase, speed improvements have fueled tremendous advancements in computing and have enabled new multi-media applications. Such trends, aimed at integrating higher levels of circuit functionality are tightly related to an emphasis on compactness in consumer electronic products and a widespread growth and interest in wireless communications and products. These trends are expected to persist for some time as technology and design methodologies continue to evolve and the era of Systems on a Chip has definitely come of age. While technology improvements and spiraling silicon capacity allow designers to pack more functions onto a single piece of silicon, they also highlight a pressing challenge for system designers to keep up with such amazing complexity. To handle higher operating speeds and the constraints of portability and connectivity, new circuit techniques have appeared. Intensive research and progress in EDA tools, design methodologies and techniques is required to empower designers with the ability to make efficient use of the potential offered by this increasing silicon capacity and complexity and to enable them to design, test, verify and build such systems.
Parallel Computing Technologies

Author: Victor Malyshkin

Publisher: Springer

ISBN: 9783642399589

Category: Computers

Page: 444

View: 472

This book constitutes the proceedings of the 12th International Conference on Parallel Computing Technologies, PaCT 2013, held in St. Petersburg, Russia, during September 30-October 4, 2013. The 41 full papers presented together with 2 invited papers were carefully reviewed and selected from 83 submissions. The papers are organized in topical sections on all technological aspects of the applications of parallel computer systems High level parallel programming languages and systems, methods and tools for parallel solution of large-scale problems, languages, environments and software tools supporting parallel processing, operating systems, scheduling, mapping, load balancing, general architectural concepts, cellular automata, performance measurement and analysis tools, teaching parallel processing, software for grid and cloud computing, scalable computing, fragmentation and aggregation of algorithms and programs as well as programs assembling and reuse.